Available targets

This page lists the available targets to run your benchmarks on. The information includes notes about the target configuration done in the startup.

If not specified, caches are disabled by default. If not specified otherwise, an available FPU is enabled and configured for the hard-float ABI.

STM32L476VGT

This target includes the CMSIS Headers shipped by the vendor, which can be accessed by #include <SFR_Access.h>.

  • STM32L4
    • Core Clock running on 16 MHz.
  • STM32L4-SoftFPU
    • Core Clock running on 16 MHz.
    • Hardware FPU disabled, so that Software Emulation will be used by the compiler.
  • STM32L4-Fast
    • Core Clock running on 80 MHz.

STM32F407VGT

This target includes the CMSIS Headers shipped by the vendor. Access them with #include <SFR_Access.h>.

  • STM32F4
    • Core Clock running on 16 MHz.
  • STM32F4-Cache
    • Core Clock running on 16 MHz.
    • Instruction and Data cache enabled.
  • STM32F4-Fast
    • Core Clock running on 168 MHz.
  • STM32F4-Fast-Cache
    • Core Clock running on 168 MHz.
    • Instruction and Data cache enabled.